HD64F2145 Datasheet, PDF (534/829 Pages) Renesas Technology Corp – Hitachi 16-Bit Single-Chip Microcomputer

Table 18.3 shows HIF host interface channel selection and pin operation.
Table 18.3 Host Interface Channel Selection and Pin Operation
HI12E
0
1
CS2E
—
0
1
CS3E
—
0
1
0
1
CS4E
—
0
1
0
1
0
1
0
1
Operation
Host interface functions halted
Host interface channel 1 only operating
Operation of channels 2 to 4 halted
Pins P43, P81, P90, and PB0 to PB3 operate as I/O ports. &65
or (&65, &66, and &67 inputs do not operate.
Host interface channel 1 and 4 functions operating
Operation of channels 2 and 3 halted
Pins P43, P81, P90, PB0, and PB2 operate as I/O ports. &65
or (&65 and &66 inputs do not operate.
Host interface channel 1 and 3 functions operating
Operation of channels 2 and 4 halted
Pins P43, P81, P90, PB1, and PB3 operate as I/O ports. &65
or (&65 and &67 inputs do not operate.
Host interface channel 1, 3, and 4 functions operating
Operation of channel 2 halted
Pins P43, P81, and P90 operate as I/O ports. &65 or (&65
input does not operate.
Host interface channel 1 and 2 functions operating
Operation of channels 3 and 4 halted
Pins PB0 to PB3 operate as I/O ports. &66 and &67 inputs do
not operate.
Host interface channel 1, 2, and 4 functions operating
Operation of channel 3 halted
Pins PB0 and PB2 operate as I/O ports. &66 input does not
operate.
Host interface channel 1 to 3 functions operating
Operation of channel 4 halted
Pins PB1 and PB3 operate as I/O ports. &67 input does not
operate.
Host interface channel 1 to 4 functions operating
Rev. 2.0, 08/02, page 494 of 788