HD64F2145 Datasheet, PDF (346/829 Pages) Renesas Technology Corp – Hitachi 16-Bit Single-Chip Microcomputer

Bit
Bit Name Initial Value R/W Description
3
VOMOD1 0
R/W Vertical Synchronization Output Mode Select 1, 0
2
VOMOD0 0
R/W These bits select the signal source and generation
method for the IVO signal.
• ISGENE = 0
00: The IVI signal (without fall modification or IHI
synchronization) is selected
01: The IVI signal (without fall modification, with IHI
synchronization) is selected
10: The IVI signal (with fall modification, without IHI
synchronization) is selected
11: The IVI signal (with fall modification and IHI
synchronization) is selected
• ISGENE = 1
XX: The IVG signal is selected
1
CLMOD1 0
R/W Clamp Waveform Mode Select 1, 0
0
CLMOD0 0
R/W These bits select the signal source for the CLO signal
(clamp waveform).
• ISGENE = 0
00: The CL1 signal is selected
01: The CL2 signal is selected
1X: The CL3 signal is selected
• ISGENE = 1
XX: The CL4 signal is selected
Legend
X: Don’t care
Table 13.3 Registers Accessible by TMR_X/TMR_Y
TMRX/Y H'FFF0 H'FFF1
0
TMR_X TMR_X
TCR_X TCSR_X
1
TMR_Y TMR_Y
TCR_Y TCSR_Y
H'FFF2
TMR_X
TICRR
TMR_Y
TCORA_Y
H'FFF3
TMR_X
TICRF
TMR_Y
TCORB_Y
H'FFF4
TMR_X
TCNT_X
TMR_Y
TCNT_Y
H'FFF5
TMR_X
TCORC
TMR_Y
TISR
H'FFF6 H'FFF7
TMR_X TMR_X
TCORA_X TCORB_X
Rev. 2.0, 08/02, page 306 of 788