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HD64F2145 Datasheet, PDF (170/829 Pages) Renesas Technology Corp – Hitachi 16-Bit Single-Chip Microcomputer
6.5.4 Wait Control
When accessing the external address space, this LSI can extend the bus cycle by inserting one or
more wait states (TW). There are three ways of inserting wait states: Program wait insertion, pin
wait insertion using the :$,7 pin, and the combination of program wait and the :$,7 pin.
Program Wait Mode: A specified number of wait states TW can be inserted automatically
between the T2 state and T3 state when accessing the external address space always according to
the settings of the WC1 and WC0 bits in WSCR.
Pin Wait Mode: A specified number of wait states TW can be inserted automatically between the
T2 state and T3 state when accessing the external address space always according to the settings of
the WC1 and WC0 bits. If the :$,7 pin is low at the falling edge of ø in the last T2 or TW state,
another TW state is inserted. If the :$,7 pin is held low, TW states are inserted until it goes high.
This is useful when inserting four or more TW states, or when changing the number of TW states to
be inserted for each external device.
Pin Auto-Wait Mode: A specified number of wait states TW can be inserted automatically
between the T2 state and T3 state when accessing the external address space according to the
settings of the WC1 and WC0 bits if the :$,7 pin is low at the falling edge of ø in the last T2
state. Even if the :$,7 pin is held low, TW states can be inserted only up to the specified number
of states.
This function enables the low-speed memory interface only by inputting the chip select signal to
the :$,7 pin.
Figure 6.13 shows an example of wait state insertion timing in pin wait mode.
The settings after a reset are: 3-state access, 3 program wait insertion, and :$,7 pin input
disabled.
Rev. 2.0, 08/02, page 130 of 788