HD64F2145 Datasheet, PDF (22/829 Pages) Renesas Technology Corp – Hitachi 16-Bit Single-Chip Microcomputer

Section 22 RAM................................................................................................ 575
Section 23 ROM................................................................................................ 577
23.1 Features .............................................................................................................................577
23.2 Mode Transitions...............................................................................................................579
23.3 Block Configuration..........................................................................................................582
23.3.1 Block Configuration of 64-Kbyte Flash Memory ................................................582
23.3.2 Block Configuration of 128-Kbyte Flash Memory ..............................................583
23.3.3 Block Configuration of 256-Kbyte Flash Memory ..............................................584
23.4 Input/Output Pins ..............................................................................................................585
23.5 Register Descriptions ........................................................................................................585
23.5.1 Flash Memory Control Register 1 (FLMCR1) .....................................................586
23.5.2 Flash Memory Control Register 2 (FLMCR2) .....................................................587
23.5.3 Erase Block Registers 1 and 2 (EBR1, EBR2).....................................................587
23.6 Operating Modes ...............................................................................................................591
23.7 On-Board Programming Modes ........................................................................................591
23.7.1 Boot Mode............................................................................................................592
23.7.2 User Program Mode .............................................................................................596
23.8 Flash Memory Programming/Erasing ...............................................................................598
23.8.1 Program/Program-Verify .....................................................................................598
23.8.2 Erase/Erase-Verify ...............................................................................................600
23.9 Program/Erase Protection..................................................................................................602
23.9.1 Hardware Protection.............................................................................................602
23.9.2 Software Protection ..............................................................................................602
23.9.3 Error Protection....................................................................................................602
23.10 Interrupts during Flash Memory Programming/Erasing....................................................603
23.11 Programmer Mode.............................................................................................................604
23.12 Usage Notes.......................................................................................................................604
Section 24 Masked ROM .................................................................................. 607
Section 25 Clock Pulse Generator..................................................................... 609
25.1 Oscillator ...........................................................................................................................610
25.1.1 Connecting Crystal Resonator..............................................................................610
25.1.2 External Clock Input Method ...............................................................................611
25.2 Duty Correction Circuit.....................................................................................................613
25.3 Medium-Speed Clock Divider...........................................................................................613
25.4 Bus Master Clock Select Circuit .......................................................................................614
25.5 Subclock Input Circuit ......................................................................................................614
25.6 Subclock Waveform Forming Circuit ...............................................................................614
25.7 Clock Select Circuit...........................................................................................................615
25.8 Processing for X1 and X2 Pins..........................................................................................615
25.9 Usage Notes.......................................................................................................................616
Rev. 2.0, 08/02, page xx of xxxviii