HD64F2145 Datasheet, PDF (345/829 Pages) Renesas Technology Corp – Hitachi 16-Bit Single-Chip Microcomputer

13.3.3 Timer Connection Register S (TCONRS)
TCONRS selects whether to access TMR_X or TMR_Y registers, and the synchronization signal
output signal source and generation method.
Bit
Bit Name Initial Value R/W Description
7
TMRX/Y 0
R/W TMR_X/TMR_Y Access Select
For details, see table 13.3.
0: The TMR_X registers are accessed at addresses
H'(FF)FFF0 to H'(FF)FFF5
1: The TMR_Y registers are accessed at addresses
H'(FF)FFF0 to H'(FF)FFF5
6
ISGENE 0
R/W Internal Synchronization Signal
Selects internal synchronization signals (IHG, IVG,
and CL4 signals) as the signal sources for the IHO,
IVO, and CLO signals together with the HOMOD1,
HOMOD0, VOMOD1, VOMOD0, CLMOD1, and
CLMOD0 bits.
5
HOMOD1 0
R/W Horizontal Synchronization Output Mode Select 1, 0
4
HOMOD0 0
R/W These bits select the signal source and generation
method for the IHO signal.
• ISGENE = 0
00: The IHI signal (without 2fH modification) is
selected
01: The IHI signal (with 2fH modification) is selected
1X: The CL1 signal is selected
• ISGENE = 1
XX: The IHG signal is selected
Rev. 2.0, 08/02, page 305 of 788