HD64F2145 Datasheet, PDF (636/829 Pages) Renesas Technology Corp – Hitachi 16-Bit Single-Chip Microcomputer

Table 23.6 System Clock Frequencies for which Automatic Adjustment of LSI Bit Rate is
Possible
Host Bit Rate
19200 bps
9600 bps
4800 bps
System Clock Frequency Range of
LSI (3-V Version)
8 to 10 MHz
4 to 10 MHz
2 to 10 MHz
System Clock Frequency Range of
LSI (5-V Version)
8 to 20 MHz
4 to 20 MHz
2 to 18 MHz
H8S/2140B, H8S/2141B, H8S/2148B,
H8S/2160B, and H8S/2161B
H'FFE080
ID code area
H'FFE088
Programming control program area
(2040 bytes)
H'FFE880
Boot program area* (1920 bytes)
H'FFD080
H'FFD088
H8S/2145B
ID code area
Programming control program area
(6136 bytes)
H'FFE880
Boot program area* (1920 bytes)
H'FFEFFF
H'FFFF00
H'FFFF7F
Boot program area* (128 bytes)
H'FFEFFF
H'FFFF00
H'FFFF7F
Boot program area* (128 bytes)
Note: The boot program area and area which is not used cannot be used until a transition is made
to the execution state for the programming control program transferred to RAM.
Note that the contents of the boot program area in RAM are remained after a branch is made to
the programming control program.
Figure 23.8 On-Chip RAM Area in Boot Mode
In boot mode, this LSI checks the contents of the 8-byte ID code area as shown below to confirm
that the programming control program corresponds with this LSI. To originally write a
programming control program to be used in boot mode, the above 8-byte ID code must be added at
the beginning of the program.
H'FFE080
H'FFE088
40
FE
64
66
32
31
34
39
(Product ID) H8S/2140B, H8S/2141B, H8S/2148B, H8S/2160B, or H8S/2161B
Instruction codes of the programming control program
H'FFD080
H'FFD088
40
FE
64
66
32
31
34
35
(Product ID) H8S/2145B
Instruction codes of the programming control program
Figure 23.9 ID Code Area
Rev. 2.0, 08/02, page 596 of 788