HD64F2145 Datasheet, PDF (553/829 Pages) Renesas Technology Corp – Hitachi 16-Bit Single-Chip Microcomputer

R/W
Bit Bit Name Initial Value Slave Host Description
4 LRSTB 0
— — LPC Software Reset Bit
Resets the host interface. For the scope of
initialization by an LPC reset, see section 19.4.4,
Host Interface Shutdown Function (LPCPD).
0: Normal state
[Clearing conditions]
• Writing 0
• LPC hardware reset
1: LPC software reset state
[Setting condition]
• Writing 1 after reading LRSTB = 0
3 SDWNB 0
R/W — LPC Software Shutdown Bit
Controls host interface shutdown. For details of the
LPC shutdown function, and the scope of
initialization by an LPC reset and an LPC shutdown,
see section 19.4.4, Host Interface Shutdown
Function (LPCPD).
0: Normal state
[Clearing conditions]
• Writing 0
• LPC hardware reset or LPC software reset
• LPC hardware shutdown
• LPC hardware shutdown release
(rising edge of /3&3' signal when SDWNE = 0)
1: LPC software shutdown state
[Setting condition]
• Writing 1 after reading SDWNB = 0
2 PMEB 0
R/W — PME Output Bit
Controls PME output in combination with the PMEE
bit. For details, refer to description on the PMEE bit
in HICR0.
1 LSMIB 0
R/W — LSMI Output Bit
Controls LSMI output in combination with the LSMIE
bit. For details, refer to description on the LSMIE bit
in HICR0.
Rev. 2.0, 08/02, page 513 of 788