HD64F2145 Datasheet, PDF (355/829 Pages) Renesas Technology Corp – Hitachi 16-Bit Single-Chip Microcomputer

Table 13.7 Examples of TCR, TCSR, TOCR, and OCRDM Settings
Register
Bit
TCR in FRT
4
1 and 0
TCSR in FRT 0
TOCR in FRT 7
OCRDM in FRT 7 to 0
Abbreviation
IEDGD
CKS1 and CKS0
CCLRA
ICRDMS
OCRDM7 to
OCRDM0
Contents Description
1
FRC value is transferred to ICRD on
the rising edge of input capture input
D (IHI signal)
01
FRC is incremented on internal clock:
ø/8
0
FRC clearing is disabled
1
ICRD is set to the operating mode in
which OCRDM is used
H'01 to H'FF Specifies the period during which
ICRD operation is masked
IHI signal
(without 2fH
modification)
IHI signal
(with 2fH
modification)
Mask interval
ICRD + OCRDM × 2
ICRD + OCRDM
FRC
ICRD
Figure 13.6 2fH Modification Timing Chart
Rev. 2.0, 08/02, page 315 of 788