HD64F2145 Datasheet, PDF (358/829 Pages) Renesas Technology Corp – Hitachi 16-Bit Single-Chip Microcomputer

Table 13.9 Examples of OCRAR, OCRAF, TCORA, TCORB, TCR, and TCSR Settings
Register
Bit
Abbreviation Contents Description
TCR in
7
CMIEB
0
TMR_Y
6
CMIEA
0
Interrupts due to compare-match and
overflow are disabled
5
OVIE
0
4 and 3 CCLR1 and 01
CCLR0
TCNT is cleared by compare-match A
2 to 0 CKS2 to CKS0 001
TCNT is incremented on internal clock:
ø/4
TCSR in
TMR_Y
3 to 0 OS3 to OS0 0110
0 output on compare-match B
1 output on compare-match A
TCORA in TMR_Y
H'3F
IHG signal period = ø × 256
(example)
TCORB in TMR_Y
H'03
IHG signal 1 interval = ø × 16
(example)
TCR in FRT 1 and 0 CKS1 and
01
CKS0
FRC is incremented on internal clock: ø/8
OCRAR in FRT
H'7FEF IVG signal 0
(example) interval =
ø × 262016
IVG signal period =
ø × 262144 (1024
times IHG signal)
OCRAF in FRT
H'000F IVG signal 1
(example) interval = ø × 128
TOCR in FRT 6
OCRAMS
1
OCRA is set to the operating mode in
which OCRAR and OCRAF are used
Rev. 2.0, 08/02, page 318 of 788