HD64F2145 Datasheet, PDF (823/829 Pages) Renesas Technology Corp – Hitachi 16-Bit Single-Chip Microcomputer

Item
Page
28.2.7 Usage Notes
736
Figure 28.5 Connection of
VCL Capacitor
Revisions (See Manual for Details)
(Error)
(Correction)
Bypass
capacitor
VCC2
Bypass
capacitor
Product without
internal step-down function
10
0.01
10
0.01
VSS
VCL
Product without
internal step-down function
VSS
28.3.4 On-Chip Peripheral 743
Module Timing
Figure 28.16 I/O Port
Input/Output Timing
Corrected.
ø
Ports 1 to 9, A, and B
(Ports C to G are added
in H8S/2160B and
H8S/2161B)
(read)
Ports 1 to 6, 8, 9, A,
and B
(Ports C to F are added
in H8S/2160B and
H8S/2161B)
(write)
T₁
T₂
t_PRS t_PRH
t_PWD
Figure 28.27 Host
746
Interface (XBS) Timing
Appendix A I/O Port
752
States in Each Processing
State
Table A.1 I/O Port States
in Each Processing State
(Error)
Note:* The rising edge timing is the same as the port 4 and
port B output timing. See figure 27.14.
(Correction)
Note:* The rising edge timing is the same as the port 4 and
port B output timing. See figure 28.16.
(Error) Ports C to G
(Correction) Ports C to G (H8S/2160B, H8S/2161B)
Rev. 2.0, 08/02, page 783 of 788