HD64F2145 Datasheet, PDF (406/829 Pages) Renesas Technology Corp – Hitachi 16-Bit Single-Chip Microcomputer

Initialization
Start reception
[1] SCI initialization:
[1]
The RxD pin is automatically
designated as the receive data input
pin.
[2]
Read ORER, PER, and
[2]
FER flags in SSR
PER
FER ORER = 1
No
Yes
[3]
Error processing
(Continued on next page)
Read RDRF flag in SSR
[4]
[3] Receive error processing and break
detection:
If a receive error occurs, read the
ORER, PER, and FER flags in SSR to
identify the error. After performing the
appropriate error processing, ensure
that the ORER, PER, and FER flags are
all cleared to 0. Reception cannot be
resumed if any of these flags are set to
1. In the case of a framing error, a
break can be detected by reading the
value of the input port corresponding to
the RxD pin.
No
RDRF = 1
Yes
Read receive data in RDR, and
clear RDRF flag in SSR to 0
No
All data received?
[5]
Yes
Clear RE bit in SCR to 0
[4] SCI status check and receive data read:
Read SSR and check that RDRF = 1,
then read the receive data in RDR and
clear the RDRF flag to 0. Transition of
the RDRF flag from 0 to 1 can also be
identified by an RXI interrupt.
[5] Serial reception continuation procedure:
To continue serial reception, before the
stop bit for the current frame is
received, read the RDRF flag, read
RDR, and clear the RDRF flag to 0.
However, the RDRF flag is cleared
automatically when the DTC is initiated
by an RXI interrupt and reads data from
RDR.
<End>
Legend:
: Logical OR
Figure 15.9 Sample Serial Reception Flowchart (1)
Rev. 2.0, 08/02, page 366 of 788