HD64F2145 Datasheet, PDF (481/829 Pages) Renesas Technology Corp – Hitachi 16-Bit Single-Chip Microcomputer

Continuous Receive Operation:
Figure 16.21 shows the sample flowchart for the operations in slave receive mode (HNDS = 0).
Slave receive mode
Set MST = 0
and TRS = 0 in ICCR
Set ACKB = 0 in ICSR
Set HNDS = 0 in ICXR
Clear IRIC in ICCR
No
ICDRF = 1?
Yes
Read ICDR
Read IRIC in ICCR
No
IRIC = 1?
Yes
Clear IRIC in ICCR
[1] Select slave receive mode.
[2] Read the receive data remaining unread.
[3] to [7] Wait for one byte to be received (slave address + R/W)
(Set IRIC at the rise of the 9th clock)
[8] Clear IRIC
Read AASX, AAS and ADZ in ICSR
AAS = 1
Yes
and ADZ = 1?
General call address processing
No
Read TRS in ICCR
* Description omitted
Yes
TRS = 1?
Slave transmit mode
No
(n-2)th-byte
reception?
* n: Address + total number of bytes received
No
Wait for one frame
Set ACKB = 1 in ICSR
ICDRF = 1?
No
Yes
Read ICDR
Read IRIC in ICCR
No
IRIC = 1?
[9] Wait for ACKB setting and set acknowledge data
for the last reception
(after the rise of the 9th clock of (n-1)th byte data)
[10] Read the receive data. The first read is a dummy read.
[11] Wait for one byte to be received
(Set IRIC at the rise of the 9th clock)
ESTP = 1 or
Yes
STOP = 1?
No
Clear IRIC in ICCR
[12] Detect stop condition
[13] Clear IRIC
No
ICDRF = 1?
Yes
Read ICDR
Clear IRIC in ICCR
End
[14] Read the last receive data
[15] Clear IRIC
Figure 16.21 Sample Flowchart for Operations in Slave Receive Mode (HNDS = 0)
Rev. 2.0, 08/02, page 441 of 788