HD64F2145 Datasheet, PDF (765/829 Pages) Renesas Technology Corp – Hitachi 16-Bit Single-Chip Microcomputer

Timing of On-Chip Peripheral Modules: Tables 28.23 to 28.26 show the on-chip peripheral
module timing. The only on-chip peripheral modules that can operate in subclock operation (ø =
32.768 kHz) are the I/O ports, external interrupts (NMI and IRQ0, 1, 2, 6, and 7), the watchdog
timer, and the 8-bit timer (channels 0 and 1).
Table 28.23 Timing of On-Chip Peripheral Modules (1)
Condition A:
V_CC = 5.0 V ± 10 %, V_CCB = 5.0 V ± 10 %, V_SS = 0 V,
ø = 32.768 kHz*, 2 MHz to maximum operating frequency,
T_a = –20 to +75°C (normal specification product), T_a = –40 to +85°C (wide
range temperature specification product)
Condition B:
V_CC = 4.0 V to 5.5 V, V_CCB = 4.0 V to 5.5 V, V_SS = 0 V,
ø = 32.768 kHz*, 2 MHz to maximum operating frequency,
T_a = –20 to +75°C (normal specification product), T_a = –40 to +85°C (wide
range temperature specification product)
Condition C:
V_CC = 2.7 V to 3.6 V, V_CCB = 2.7 V to 5.5 V, V_SS = 0 V, ø = 32.768 kHz*,
2 MHz to maximum operating frequency, T_a = –20 to +75°C
Item
Sym-
bol
I/O Output data delay time
t_PWD
ports _{Input data setup time}
t_PRS
Input data hold time
t
PRH
FRT Timer output delay time t_FTOD
Timer input setup time
t_FTIS
Timer clock input setup
t_FTCS
time
TMR
Timer clock Single edge
pulse width _{Both edges}
Timer output delay time
t_FTCWH
t_FTCWL
t_TMOD
Timer reset input setup
t
TMRS
time
Timer clock input setup t
TMCS
time
Condition Condition Condition
A
B
C
10 MHz 16 MHz 20 MHz
Test
Min Max Min Max Min Max Unit Conditions
— 100 — 50 — 50 ns Figure
50 — 30 — 30 —
28.16
50 — 30 — 30 —
— 100 — 50 — 50 ns Figure
50 — 30 — 30 —
28.17
50 — 30 — 30 —
Figure
28.18
1.5 — 1.5 — 1.5 — t_cyc
2.5 — 2.5 — 2.5 —
— 100 — 50 — 50 ns Figure
28.19
50 — 30 — 30 —
Figure
28.21
50 — 30 — 30 —
Figure
28.20
Rev. 2.0, 08/02, page 725 of 788