HD64F2145 Datasheet, PDF (556/829 Pages) Renesas Technology Corp – Hitachi 16-Bit Single-Chip Microcomputer

R/W
Bit Bit Name Initial Value Slave Host Description
0 ERRIE 0
R/W — Error Interrupt Enable
Enables or disables ERRI interrupt to the slave
processor (this LSI).
0: Error interrupt requests disabled
1: Error interrupt requests enabled
Note:* Only 0 can be written to bits 6 to 4, to clear the flag.
• HICR3
R/W
Bit Bit Name Initial Value Slave Host Description
7 LFRAME Undefined R
— /)5$0( Pin Monitor
6 CLKRUN Undefined R
— &/.581 Pin Monitor
5 SERIRQ Undefined R
— SERIRQ Pin Monitor
4 LRESET Undefined R
— /5(6(7 Pin Monitor
3 LPCPD Undefined R
— /3&3' Pin Monitor
2 PME
Undefined R
— 30( Pin Monitor
1 LSMI
Undefined R
— /60, Pin Monitor
0 LSCI
Undefined R
— LSCI Pin Monitor
Rev. 2.0, 08/02, page 516 of 788