HD64F2145 Datasheet, PDF (351/829 Pages) Renesas Technology Corp – Hitachi 16-Bit Single-Chip Microcomputer

Examples of TCR settings of TMR_X are the same as those in table 13.4. The clamp waveform
timing charts are shown in figures 13.3 and 13.4.
Since the rise of the CL1 and CL2 signals is synchronized with the edge of the IHI signal, and
their fall is synchronized with the system clock, the pulse width variation is equivalent to the
resolution of the system clock.
Both the rise and the fall of the CL3 signal are synchronized with the system clock and the pulse
width is fixed, but there is a variation in the phase relationship with the IHI signal equivalent to
the resolution of the system clock.
IHI signal
CL1 signal
CL2 signal
TCNT
TCORA
Figure 13.3 Timing Chart for Clamp Waveform Generation (CL1 and CL2 Signals)
IHI signal
CL3 signal
TCNT
TICR + TCORC
TICR
Figure 13.4 Timing Chart for Clamp Waveform Generation (CL3 Signal)
Rev. 2.0, 08/02, page 311 of 788