HD64F2145 Datasheet, PDF (146/829 Pages) Renesas Technology Corp – Hitachi 16-Bit Single-Chip Microcomputer

5.6.5 DTC Activation by Interrupt
The DTC can be activated by an interrupt. In this case, the following options are available:
• Interrupt request to CPU
• Activation request to DTC
• Selection of a number of the above
For details on interrupt requests that can be used to activate the DTC, see section 7, Data Transfer
Controller (DTC).
Figure 5.8 shows a block diagram of the DTC and interrupt controller.
Interrupt
request
IRQ
interrupt
Interrupt source
On-chip
clear signal
supporting
module
Selection
circuit
Select
signal
Clear signal
DTCER
DTVECR
SWDTE
clear signal
Control logic
Interrupt controller
Determination of
priority
DTC activation
request vector
number
Clear signal
CPU interrupt
request vector
number
I, UI
DTC
CPU
Figure 5.8 DTC and Interrupt Controller
Selection of Interrupt Source: Interrupt factors are selected as DTC activation source or CPU
interrupt source by the DTCE bit of DTCERA to DTCERE of DTC.
By specifying the DISEL bit of the DTC’s MRB, it is possible to clear the DTCE bit to 0 after
DTC data transfer, and request a CPU interrupt.
If DTC carries out the designate number of data transfers and the transfer counter reads 0, after
DTC data transfer, the DTCE bit is also cleared to 0, and an interrupt is requested to the CPU.
Determination of Priority: The DTC activation source is selected in accordance with the default
priority order, and is not affected by mask or priority levels. See table 7.1 for the respective
priority.
Rev. 2.0, 08/02, page 106 of 788