HD64F2145 Datasheet, PDF (514/829 Pages) Renesas Technology Corp – Hitachi 16-Bit Single-Chip Microcomputer

1
Read KBCRH
No
KCLKI = 0?
Yes
No
KDI = 0?
*
Yes
Read KBCRH
No
KCLK = 1?
Yes
Transmit end state
(KCLK = high, KD = high)
[7]
[8]
Error handling
2
Keyboard side in data
transmission state.
Execute receive abort
processing.
To receive operation or
transmit operation
Note:* To switch to reception after transmission, set KBE to 1 (KBBR receive enable) while KCLKI is low.
Figure 17.5 (2) Sample Transmit Processing Flowchart
KCLK
(pin state)
KD
(pin state)
KCLK
(output)
KD
(output)
KCLK
(input)
KD
(input)
1
Start bit 0
I/O inhibit
Start bit 0
2
1
1
8
9
10
11
7 Parity bit Stop bit
7 Parity bit Stop bit
Receive
completed
notification
[1] [2] [3] [4] [5] [6]
Figure 17.6 Transmit Timing
Rev. 2.0, 08/02, page 474 of 788
[7]
[8]