HD64F2145 Datasheet, PDF (405/829 Pages) Renesas Technology Corp – Hitachi 16-Bit Single-Chip Microcomputer

Table 15.9 shows the states of the SSR status flags and receive data handling when a receive error
is detected. If a receive error is detected, the RDRF flag retains its state before receiving data.
Reception cannot be resumed while a receive error flag is set to 1. Accordingly, clear the ORER,
FER, PER, and RDRF bits to 0 before resuming reception. Figure 15.9 shows a sample flow chart
for serial data reception.
Table 15.9 SSR Status Flags and Receive Data Handling
SSR Status Flag
RDRF* ORER FER
PER
Receive Data
Receive Error Type
1
1
0
0
Lost
Overrun error
0
0
1
0
Transferred to RDR Framing error
0
0
0
1
Transferred to RDR Parity error
1
1
1
0
Lost
Overrun error + framing error
1
1
0
1
Lost
Overrun error + parity error
0
0
1
1
Transferred to RDR Framing error + parity error
1
1
1
1
Lost
Overrun error + framing error +
parity error
Note:* The RDRF flag retains the state it had before data reception.
Rev. 2.0, 08/02, page 365 of 788