HD64F2145 Datasheet, PDF (474/829 Pages) Renesas Technology Corp – Hitachi 16-Bit Single-Chip Microcomputer

Slave receive mode
Set TRS = 0 in ICCR
Set ACKB = 0 in ICSR
Set HNDS = 0 in ICXR
Clear IRIC flag in ICCR
Set WAIT = 0 in ICMR
Read ICDR
Read IRIC flag in ICCR
No
IRIC = 1?
Yes
Set ACKB = 1 in ICSR
Set TRS = 1 in ICCR
Clear IRIC flag in ICCR
Read IRIC flag in ICCR
No
IRIC = 1?
Yes
Set WAIT = 0 in ICMR
Clear IRIC flag in ICCR
Read ICDR
Set BBSY = 0 and
SCP = 0 in ICCR
[1] Select receive mode.
[2] Start receiving. The first read
is a dummy read.
[7] Set acknowledge data for
the last reception.
[9] Set TRS for stop condition issuance
[11] Clear IRIC flag.
(to end the wait insertion)
[12] Wait for 1 byte to be received.
(Set IRIC at the rise of the 9th clock)
[15] Clear wait mode.
Clear IRIC flag.
( IRIC flag should be cleared to 0
after setting WAIT = 0.)
[16] Read the last receive data
[17] Generate stop condition
End
Figure 16.15 Sample Flowchart for Operations in Master Receive Mode
(receiving a single byte) (WAIT = 1)
Rev. 2.0, 08/02, page 434 of 788