HD64F2145 Datasheet, PDF (162/829 Pages) Renesas Technology Corp – Hitachi 16-Bit Single-Chip Microcomputer

6.5.3 Basic Operation Timing
8-Bit, 2-State Access Space: Figure 6.5 shows the bus timing for an 8-bit, 2-state access space.
When an 8-bit access space is accessed, the upper half (D15 to D8) of the data bus is used. Wait
states cannot be inserted.
Bus cycle
T₁
T₂
Ø
Address bus
/ (IOSE = 1)
/ (IOSE = 0)
Read D15 to D8
D7 to D0
Valid
Invalid
Write
D15 to D8
Valid
Figure 6.5 Bus Timing for 8-Bit, 2-State Access Space
Rev. 2.0, 08/02, page 122 of 788