HD64F2145 Datasheet, PDF (456/829 Pages) Renesas Technology Corp – Hitachi 16-Bit Single-Chip Microcomputer

Bit Bit Name Initial Value R/W Description
2 AAS
0
R/(W)* Slave Address Recognition Flag
In I²C bus format slave receive mode, this flag is set to 1 if
the first frame following a start condition matches bits SVA6
to SVA0 in SAR, or if the general call address (H'00) is
detected.
[Setting condition]
When the slave address or general call address (one frame
including a R/: bit is H’00) is detected in slave receive
mode and FS = 0 in SAR
[Clearing conditions]
• When ICDR is written to (transmit mode) or read from
(receive mode)
• When 0 is written in AAS after reading AAS = 1
• In master mode
1 ADZ
0
R/(W)* General Call Address Recognition Flag
In I²C bus format slave receive mode, this flag is set to 1 if
the first frame following a start condition is the general call
address (H'00).
[Setting condition]
When the general call address (one frame including a R/:
bit is H’00) is detected in slave receive mode and FS = 0 or
FSX = 0
[Clearing conditions]
• When ICDR is written to (transmit mode) or read from
(receive mode)
• When 0 is written in ADZ after reading ADZ = 1
• In master mode
If a general call address is detected while FS=1 and
FSX=0, the ADZ flag is set to 1; however, the general call
address is not recognized (AAS flag is not set to 1).
Rev. 2.0, 08/02, page 416 of 788