SH7144_08 Datasheet, PDF (919/930 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperHTM RISC engine Family/SH7144 Series

Main Revisions for this Edition
Item
Page Revision (See Manual for Details)
13.6.1 Clock
443
13.6.2 SCI Initialization 444
(Clocked Synchronous
Mode)
Figure 13.15 Sample SCI
Initialization Flowchart
14.3.4 I2C Bus Mode 476
Register (ICMR)
Table 14.3 Setting of the
Transfer Rate
Description added
… Eight serial clock pulses are output in the transfer of one
character, and when no transfer is performed, the clock is fixed
high. However, during receive-only operation the
synchronization clock is output until an overrun error occurs or
the RE bit is cleared to 0. When receive operation in single-
character units is desired, select an external clock as the clock
source.
Figure replaced
Table and note amended
Pφ=
10MHz
Pφ=
16MHz
Transfer Rate
Pφ=
Pφ=
20MHz 25MHz
Pφ=
33MHz
Pφ=
40MHz
357kHz 571kHz* 714kHz* 893kHz* 1.18MHz* 1.43MHz*
250kHz
208kHz
156kHz
125kHz
400kHz
333kHz
250kHz
200kHz
500kHz* 625kHz* 825kHz* 1.00MHz*
417kHz* 521kHz* 688kHz* 833kHz*
313kHz 391kHz 516kHz* 625kHz*
250kHz 313kHz 413kHz* 500kHz*
100kHz 160kHz 200kHz 250kHz 330kHz 400kHz
89.3kHz 143kHz 179kHz 223kHz 295kHz 357kHz
78.1kHz 125kHz 156kHz 195kHz 258kHz 313kHz
14.5 Usage Notes
10. Notes on WAIT
function
Note: * Out of the I²C bus interface specification (Normal
mode: maximum100 kHz, High speed mode:
maximum 400 kHz)
Due to factors such as load conditions, it may not be
possible to obtain the designated transfer rate when
the value of IICX is 0 and the peripheral clock φ
frequency exceeds 16 MHz. Set IICX to 1 when Pφ is
greater than 16 MHz.
535, Description added
536
Rev.4.00 Mar. 27, 2008 Page 875 of 882
REJ09B0108-0400