SH7144_08 Datasheet, PDF (778/930 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperHTM RISC engine Family/SH7144 Series

25. List of Registers
25.1 Register Address Table (In the Order from Lower Addresses)
Access sizes are indicated with the number of bits. Access states are indicated with the number of
specified reference clock states. These values are those at 8-bit access (B), 16-bit access (W), or
32-bit access (L).
Note: Access to undefined or reserved addresses is prohibited. Correct operation cannot be
guaranteed if these addresses are accessed.
Register name
⎯
Serial mode register_0
Bit rate register_0
Serial control register_0
Transmit data register_0
Serial status register_0
Receive data register_0
Serial direction control register_0
⎯
Serial mode register_1
Bit rate register_1
Serial control register_1
Transmit data register_1
Serial status register_1
Receive data register_1
Serial direction control register_1
⎯
Serial mode register_2
Bit rate register_2
Serial control register_2
Transmit data register_2
Serial status register_2
Receive data register_2
Serial direction control register_2
abbreviation NO. of bits Address
Module
⎯
⎯
SMR_0
8
BRR_0
8
SCR_0
8
TDR_0
8
SSR_0
8
RDR_0
8
SDCR_0
8
⎯
⎯
SMR_1
8
BRR_1
8
SCR_1
8
TDR_1
8
SSR_1
8
RDR_1
8
SDCR_1
8
⎯
⎯
SMR_2
8
BRR_2
8
SCR_2
8
TDR_2
8
SSR_2
8
RDR_2
8
SDCR_2
8
H'FFFF8000 to ⎯
H'FFFF819F
H'FFFF81A0 SCI
H'FFFF81A1 (Channel 0)
H'FFFF81A2
H'FFFF81A3
H'FFFF81A4
H'FFFF81A5
H'FFFF81A6
H'FFFF81A7 to ⎯
H'FFFF81AF
H'FFFF81B0 SCI
H'FFFF81B1 (Channel 1)
H'FFFF81B2
H'FFFF81B3
H'FFFF81B4
H'FFFF81B5
H'FFFF81B6
H'FFFF81B7 to ⎯
H'FFFF81BF
H'FFFF81C0 SCI
H'FFFF81C1 (Channel 2)
H'FFFF81C2
H'FFFF81C3
H'FFFF81C4
H'FFFF81C5
H'FFFF81C6
Access size
⎯
NO. of Access states
⎯
8, 16
8
8, 16
8
8, 16
8
8
⎯
Pφ reference
B:2
W:4
8, 16
8
8, 16
8
8, 16
8
8
⎯
8, 16
8
8, 16
8
8, 16
8
8
Rev.4.00 Mar. 27, 2008 Page 734 of 882
REJ09B0108-0400