SH7144_08 Datasheet, PDF (669/930 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperHTM RISC engine Family/SH7144 Series

17. Pin Function Controller (PFC)
Register Bit
Initial
Bit Name Value R/W Description
PECRL2 5
PECRL2 4
PE2MD1 0
PE2MD0 0
R/W PE2 Mode
R/W Select the function of the
PE2/TIOC0C/DREQ1/TDI pin. Fixed to TDI
input when using E10A (in DBGMD = high).*
00: PE2 I/O (port)
01: TIOC0C I/O (MTU)
10: DREQ1 input (DMAC)
11: Setting prohibited
PECRL2 3
PE1MD1 0
R/W PE1 Mode
PECRL2 2
PE1MD0 0
R/W Select the function of the
PE1/TIOC0B/DRAK0/TRST pin. Fixed to TRST
input when using E10A (in DBGMD = high).*
00: PE1 I/O (port)
01: TIOC0B I/O (MTU)
10: DRAK0 output (DMAC)
11: Setting prohibited
PECRL2 1
PE0MD1 0
R/W PE0 Mode
PECRL2 0
PE0MD0 0
R/W Select the function of the PE0/TIOC0A/
DREQ0/TMS pin. Fixed to TMS input when
using E10A (in DBGMD = high).*
00: PE0 I/O (port)
01: TIOC0A I/O (MTU)
10: DREQ0 input (DMAC)
11: Setting prohibited
Note: * F-ZTAT version only. Setting prohibited for the masked ROM version and ROM less
version.
Rev.4.00 Mar. 27, 2008 Page 625 of 882
REJ09B0108-0400