SH7144_08 Datasheet, PDF (741/930 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperHTM RISC engine Family/SH7144 Series

22. User Debugging Interface (H-UDI)
22.3.1 Instruction Register (SDIR)
The instruction register (SDIR) is a 16-bit register that can be read, but not written to, by the CPU.
H-UDI instructions can be transferred to SDIR from TDI by serial input. SDIR can be initialized
by the TRST signal, but is not initialized in software standby mode.
Instructions transferred to SDIR must be 4 bits in length. If an instruction exceeding 4 bits is input,
the last 4 bits of the serial data will be stored in SDIR.
Bit
Bit Name Initial value R/W Description
15
TS3
1
14
TS2
1
13
TS1
1
12
TS0
1
R Test Set Bit
R _{0xxx: setting prohibited}
R
R ^{100x: setting prohibited}
1010: H-UDI interrupt
1011: setting prohibited
110x: setting prohibited
1110: setting prohibited
1111: BYPASS mode
[Legend]
X:
Don’t care
11 to 0 ⎯
All 0
R Reserved
These bits are always read as 0. The write value should
always be 0.
Rev.4.00 Mar. 27, 2008 Page 697 of 882
REJ09B0108-0400