SH7144_08 Datasheet, PDF (759/930 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperHTM RISC engine Family/SH7144 Series

23. Advanced User Debugger (AUD)
23.5 Usage Notes
23.5.1 Initialization
The debugger's internal buffers and processing states are initialized in the following cases:
1. In a power-on reset
2. When AUDRST is driven low
3. When the AUDSRST bit in the SYSCR register is cleared to 0 (see section 24.2.2, System
Control Register (SYSCR))
4. When the MSTP3 bit in the MSTCR2 register is set to 1 (see section 24.2.3, Module Standby
Control Register 1 and 2 (MSTCR1 and MSTCR2))
23.5.2 Operation in Software Standby Mode
The debugger is not initialized in software standby mode. However, since this LSI's internal
operation halts in software standby mode:
1. When AUDMD is high (RAM monitor mode), Ready is not returned (Not Ready continues to
be returned).
However, when operating on an external clock, the protocol continues.
2. When AUDMD is low (branch trace mode), operation stops. However, operation continues
when software standby is released.
23.5.3 Setting the PA15/CK pin
Some debug tools have specification that the AUDCK signal is generated out of the CK signal.
Decide the pin function controller setting after reading the manual of the debug tool to be used.
Rev.4.00 Mar. 27, 2008 Page 715 of 882
REJ09B0108-0400