SH7144_08 Datasheet, PDF (151/930 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperHTM RISC engine Family/SH7144 Series

7. User Break Controller (UBC)
UBARH/UBARL
UBAMRH/UBAMRL
Internal address
bits 31–0
32
32
32
32
32
CP1 CP0
CPU cycle
DMAC/DTC cycle
Instruction fetch
Data access
Read cycle
ID1 ID0
RW1 RW0
User
break
interrupt
Write cycle
SZ1 SZ0
Byte size
Word size
Longword size
UBID
Figure 7.2 Break Condition Determination Method
Rev.4.00 Mar. 27, 2008 Page 107 of 882
REJ09B0108-0400