SH7144_08 Datasheet, PDF (884/930 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperHTM RISC engine Family/SH7144 Series

D. I/O Port Block Diagrams
AUDATAm (AUD)
Dn (BSC)
RES
R
Q PDnDR D
C
PDDRH.WR
PDDRH.RD
Din
IRQm (INTC)
AUDATAm (AUD)
PFC
Q PDnMD0
Q PDnMD1
Dout
Q PDnIOR
AUDSYNC
AUD reset
AUDMD
SBYCR
Q IRQEL
Q Hi-Z
Bus release
Software standby
AUD module standby
RES: Reset signal
PDDRH.RD: Port D data register H read signal
PDDRH.WR: Port D data register H write signal
Din: Data input timing signal
Dout: Data output timing signal
Figure D.28 PDn/Dn/IRQm/AUDATAm
Pins
PD16/D16/
IRQ0/
AUDATA0
PD17/D17/
IRQ1/
AUDATA1
PD18/D18/
IRQ2/
AUDATA2
PD19/D19/
IRQ3/
AUDATA3
Symbol in Figure D.28
Available Products
SH7144
SH7145
PDn Dn
Masked ROM
Masked ROM
F-ZTAT version/
F-ZTAT version/
IRQm AUDATAm version _{ROM less version} version _{ROM less version}
PD16 D16 IRQ0 AUDATA0 ⎯
⎯
(BSC) (INTC) (AUD)
√
⎯
PD17 D17 IRQ1 AUDATA1 ⎯
⎯
(BSC) (INTC) (AUD)
√
⎯
PD18 D18 IRQ2 AUDATA2 ⎯
⎯
(BSC) (INTC) (AUD)
√
⎯
PD19 D19 IRQ3 AUDATA3 ⎯
⎯
(BSC) (INTC) (AUD)
√
⎯
Rev.4.00 Mar. 27, 2008 Page 840 of 882
REJ09B0108-0400