SH7144_08 Datasheet, PDF (28/930 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperHTM RISC engine Family/SH7144 Series

Figure 11.25 Example of Phase Counting Mode 1 Operation .................................................... 277
Figure 11.26 Example of Phase Counting Mode 2 Operation .................................................... 278
Figure 11.27 Example of Phase Counting Mode 3 Operation .................................................... 279
Figure 11.28 Example of Phase Counting Mode 4 Operation .................................................... 280
Figure 11.29 Phase Counting Mode Application Example......................................................... 281
Figure 11.30 Procedure for Selecting Reset-Synchronized PWM Mode.................................... 283
Figure 11.31 Reset-Synchronized PWM Mode Operation Example
(When TOCR’s OLSN = 1 and OLSP = 1) ........................................................... 284
Figure 11.32 Block Diagram of Channels 3 and 4 in Complementary PWM Mode .................. 287
Figure 11.33 Example of Complementary PWM Mode Setting Procedure................................ 288
Figure 11.34 Complementary PWM Mode Counter Operation.................................................. 290
Figure 11.35 Example of Complementary PWM Mode Operation ............................................ 292
Figure 11.36 Example of PWM Cycle Updating........................................................................ 294
Figure 11.37 Example of Data Update in Complementary PWM Mode .................................... 296
Figure 11.38 Example of Initial Output in Complementary PWM Mode (1)............................. 297
Figure 11.39 Example of Initial Output in Complementary PWM Mode (2)............................. 298
Figure 11.40 Example of Complementary PWM Mode Waveform Output (1) ......................... 300
Figure 11.41 Example of Complementary PWM Mode Waveform Output (2) ......................... 300
Figure 11.42 Example of Complementary PWM Mode Waveform Output (3) ......................... 301
Figure 11.43 Example of Complementary PWM Mode 0% and 100% Waveform Output
(1) .......................................................................................................................... 301
Figure 11.44 Example of Complementary PWM Mode 0% and 100% Waveform Output
(2) .......................................................................................................................... 302
Figure 11.45 Example of Complementary PWM Mode 0% and 100% Waveform Output
(3) .......................................................................................................................... 302
Figure 11.46 Example of Complementary PWM Mode 0% and 100% Waveform Output
(4) .......................................................................................................................... 303
Figure 11.47 Example of Complementary PWM Mode 0% and 100% Waveform Output
(5) .......................................................................................................................... 303
Figure 11.48 Example of Toggle Output Waveform Synchronized with PWM Output............. 304
Figure 11.49 Counter Clearing Synchronized with Another Channel ........................................ 305
Figure 11.50 Example of Output Phase Switching by External Input (1)................................... 306
Figure 11.51 Example of Output Phase Switching by External Input (2)................................... 307
Figure 11.52 Example of Output Phase Switching by Means of UF, VF, WF Bit Settings
(1) .......................................................................................................................... 307
Figure 11.53 Example of Output Phase Switching by Means of UF, VF, WF Bit Settings
(2) .......................................................................................................................... 308
Figure 11.54 Count Timing in Internal Clock Operation............................................................ 313
Figure 11.55 Count Timing in External Clock Operation........................................................... 313
Figure 11.56 Count Timing in External Clock Operation (Phase Counting Mode).................... 313
Rev.4.00 Mar. 27, 2008 Page xxviii of xliv
REJ09B0108-0400