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| SH7144_08 Datasheet, PDF (822/930 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperHTM RISC engine Family/SH7144 Series | |||
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26. Electrical Characteristics
VOH
CK
tAD
A21 to A0
CSn
tCSD1
RD
(read)
D31 to D0
(read)
WRx
(write)
D31 to D0
(write)
DACKn
tDACKD
T1
VOL
tRSD1
tOE
tASR
tACC
tWSD1
tASW
tWDD
T2
tCSD2
tRDS
tRSD2
tRDH
tWSD2
tWR
tWRH
tWDH
tDACKD
Note: tRDH is specified from the negate timing of A21 to A0, CSn, or RD, whichever is first.
Figure 26.9 Basic Cycle (No Waits)
Rev.4.00 Mar. 27, 2008 Page 778 of 882
REJ09B0108-0400
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