SH7144_08 Datasheet, PDF (50/930 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperHTM RISC engine Family/SH7144 Series

1. Overview
1.3 Pin Arrangement
PE0/TIOC0A/DREQ0/TMS*⁴
PE1/TIOC0B/DRAK0/TRST*⁴
PE2/TIOC0C/DREQ1/TDI*⁴
PE3/TIOC0D/DRAK1/TDO*⁴
PE4/TIOC1A/RXD3/TCK*⁴
Vss
PF0/AN0
PF1/AN1
PF2/AN2
PF3/AN3
PF4/AN4
PF5/AN5
AVss
PF6/AN6
PF7/AN7
AVcc
Vss
PE5/TIOC1B/TXD3
Vcc
PE6/TIOC2A/SCK3
PE7/TIOC2B/RXD2
PE8/TIOC3A/SCK2
PE9/TIOC3B/SCK3
PE10/TIOC3C/TXD2
Vss
PE11/TIOC3D/RXD3
PE12/TIOC4A/TXD3
PE13/TIOC4B/MRES
84 83 82 81 80 79 78 77 76 75 74 73 72 71 70 69 68 67 66 65 64 63 62 61 60 59 58 57
85
56
86
55
87
54
88
53
89
52
90
51
91
50
92
49
93
48
94
47
95
46
96
45
97
44
98
QFP-112
43
99
(Top view)
42
100
41
101
40
102
39
103
38
104
37
105
36
106
35
107
34
108
33
109
32
110
31
111
30
112
29
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28
PD12/D12/AUDRST*⁴
Vss
PD13/D13/AUDMD*⁴
PD14/D14/AUDCK*⁴
PD15/D15/AUDSYNC*⁴
PA0/RXD0
PA1/TXD0
PA2/SCK0/DREQ0/IRQ0
PA3/RXD1
PA4/TXD1
PA5/SCK1/DREQ1/IRQ1
PA6/TCLKA/CS2
PA7/TCLKB/CS3
PA8/TCLKC/IRQ2
PA9/TCLKD/IRQ3
PA10/CS0
PA11/CS1
Vss
PA12/WRL
Vcc
PA13/WRH
WDTOVF
PA14/RD
Vss(DBGMD*³)
PB9/IRQ7/A21/ADTRG
PB8/IRQ6/A20/WAIT
PB7/IRQ5/A19/BREQ
PB6/IRQ4/A18/BACK
Notes :
1. Fixed as Vcc in the masked ROM version and ROM less version, and used as an FWP input pin in the F-ZTAT version (used as an FWE in
programmer mode).
2. Used for E10A debugging mode. Used as an ASEBRKAK output pin in the F-ZTAT version. Refer to the table below for
processing the ASEBRKAK pin.
3. Used for E10A debugging mode. Fixed to Vss in the masked ROM version and ROM less version, or used as a DBGMD input pin in the
F-ZTAT version.
4. Valid only in the F-ZTAT version (invalid only in the masked ROM version and ROM less version).
5. Valid only in the masked ROM version and ROM less version (invalid in the F-ZTAT version and emulator).
ASEBRKAK Processing
Product type
Masked ROM version and ROM less version
F-ZTAT version (when using E10A)
F-ZTAT version (Not when using E10A)
Fixed to Vcc
Yes
No
Yes
Processing
Fixed to Vss
Pull-up
Yes
Yes
No
Yes
Yes
Yes
Pull-down
NC
Yes
No
No
No
Yes
No
Figure 1.3 SH7144 Pin Arrangement
Rev.4.00 Mar. 27, 2008 Page 6 of 882
REJ09B0108-0400