SH7144_08 Datasheet, PDF (890/930 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperHTM RISC engine Family/SH7144 Series

D. I/O Port Block Diagrams
TIOCxx (MTU)
RES
R
Q PEnDR D
C
PEDRL.WR
PEDRL.RD
TIOCxx (MTU)
Function 1
PFC
Q PEnMD0
Q PEnMD1
Q PEnIOR
SBYCR
Software standby
Q Hi-Z
RES: Reset signal
PEDRL.RD: Port E data register L read signal
PEDRL.WR: Port E data register L write signal
Figure D.34 PEn/TIOCxx/Function 1
Symbol in Figure D.34
Available Products
SH7144
SH7145
Pins
PEn
PE0/TIOC0A/ PE0
DREQ0
PE2/TIOC0C/ PE2
DREQ1
TIOCxx
TIOC0A
(MTU)
TIOC0C
(MTU)
Function
1
DREQ0
(DMAC)
DREQ1
(DMAC)
Masked ROM
version/
F-ZTAT ROM less
version version
⎯
√
⎯
√
F-ZTAT
version
⎯
⎯
Masked ROM
version/
ROM less
version
√
√
PE4/TIOC1A/ PE4 TIOC1A RXD3 ⎯
√
RXD3
(MTU) (SCI)
⎯
√
PE7/TIOC2B/ PE7 TIOC2B RXD2 √
√
RXD2
(MTU) (SCI)
√
√
Rev.4.00 Mar. 27, 2008 Page 846 of 882
REJ09B0108-0400