SH7144_08 Datasheet, PDF (51/930 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperHTM RISC engine Family/SH7144 Series

1. Overview
PE0/TIOC0A/DREQ0/AUDCK*⁴
PE1/TIOC0B/DRAK0/AUDMD*⁴
PE2/TIOC0C/DREQ1/AUDRST*⁴
Vcc
PE3/TIOC0D/DRAK1/AUDATA3*⁴
PE4/TIOC1A/RXD3/AUDATA2*⁴
PE5/TIOC1B/TXD3/AUDATA1*⁴
PE6/TIOC2A/SCK3/AUDATA0*⁴
Vss
PF0/AN0
PF1/AN1
PF2/AN2
PF3/AN3
PF4/AN4
PF5/AN5
AVss
PF6/AN6
PF7/AN7
AVref
AVcc
Vss
PA0/RXD0
PA1/TXD0
PA2/SCK0/DREQ0/IRQ0
PA3/RXD1
PA4/TXD1
Vcc
PA5/SCK1/DREQ1/IRQ1
PE7/TIOC2B/RXD2
PE8/TIOC3A/SCK2/TMS*⁴
PE9/TIOC3B/TRST*⁴/SCK3
PE10/TIOC3C/TXD2/TDI*⁴
Vss
PE11/TIOC3D/TDO*⁴/RXD3
PE12/TIOC4A/TCK*⁴/TXD3
PE13/TIOC4B/MRES
108 107106 105 104 103102 101 100 99 98 97 96 95 94 93 92 91 90 89 88 87 86 85 84 83 82 81 80 79 78 77 76 75 74 73
109
72
110
71
111
70
112
69
113
68
114
67
115
66
116
65
117
64
118
63
119
62
120
61
121
60
122
59
123
58
124
57
125
56
126
LQFP-144
55
127
(Top view)
54
128
53
129
52
130
51
131
50
132
49
133
48
134
47
135
46
136
45
137
44
138
43
139
42
140
41
141
40
142
39
143
38
144
37
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36
PD16/D16/IRQ0/AUDATA0*⁴
Vss
PD17/D17/IRQ1/AUDATA1*⁴
PD18/D18/IRQ2/AUDATA2*⁴
PD19/D19/IRQ3/AUDATA3*⁴
PD20/D20/IRQ4/AUDRST*⁴
PD21/D21/IRQ5/AUDMD*⁴
PD22/D22/IRQ6/AUDCK*⁴
PD23/D23/IRQ7/AUDSYNC*⁴
Vcc
PD24/D24/DERQ0
Vss
PD25/D25/DREQ1
PD26/D26/DACK0
PD27/D27/DACK1
PD28/D28/CS2
PD29/D29/CS3
Vss
PA6/TCLKA/CS2
PA7/TCLKB/CS3
PA8/TCLKC/IRQ2
PA9/TCLKD/IRQ3
PA10/CS0
PA11/CS1
PA12/WRL
PA13/WRH
PD30/D30/IRQOUT
PD31/D31/ADTRG
WDTOVF
PA14/RD
Vss(DBGMD*³ )
PB9/IRQ7/A21/ADTRG
Vcc
PB8/IRQ6/A20/WAIT
PB7/IRQ5/A19/BREQ
PB6/IRQ4/A18/BACK
Notes :
1. Fixed as Vcc in the masked ROM version and ROM less version, and used as an FWP input pin in the F-ZTAT version (used as an FWE in
programmer mode).
2. Used for E10A debugging mode. Used as an ASEBRKAK output pin in the F-ZTAT version. Refer to the table below for
processing the ASEBRKAK pin.
3. Used for E10A debugging mode. Fixed to Vss in the masked ROM version and ROM less version, or used as a DBGMD input pin in the
F-ZTAT version.
4. Valid only in the F-ZTAT version (invalid only in the masked ROM version and ROM less version).
5. Valid only in the masked ROM version and ROM less version (invalid in the F-ZTAT version and emulator).
ASEBRKAK Processing
Product type
Masked ROM version and ROM less version
F-ZTAT version (when using E10A)
F-ZTAT version (Not when using E10A)
Fixed to Vcc
Yes
No
Yes
Processing
Fixed to Vss
Pull-up
Yes
Yes
No
Yes
Yes
Yes
Pull-down
NC
Yes
No
No
No
Yes
No
Figure 1.4 SH7145 Pin Arrangement
Rev.4.00 Mar. 27, 2008 Page 7 of 882
REJ09B0108-0400