SH7144_08 Datasheet, PDF (676/930 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperHTM RISC engine Family/SH7144 Series

17. Pin Function Controller (PFC)
5. When the system uses the external space, the data I/O pins must be set as follows according to
the bus sizes in the CS space set by the bus control register 1 (BCR1).
⎯ When the CS space is the byte size (8-bit size), set all pins, D7 to D0, as data I/O pins.
⎯ When the CS space is the word size (16-bit size), set all pins, D15 to D0, as data I/O pins.
⎯ When the CS space is the longword size (32-bit size), set all pins, D31 to D0, as data I/O
pins.
If the contents in the external space are read by settings other than above ways, no correct
data can be latched. This note applies to entire space, CS0 to CS7.
6. If a power-on reset is input to the RES pin in the state where the pin is a general output pin and
set to output 1 (that is, the port control register is in the general I/O state, port I/O register is 1,
and port data register is 1), a low level may occur in the pin at a power-on reset input. To avoid
this low level from occurring, input a power-on reset after clearing the port I/O register to 0
(general input). The low level above will not occur when an internal power-on reset is input
due to a WDT overflow.
Rev.4.00 Mar. 27, 2008 Page 632 of 882
REJ09B0108-0400