SH7144_08 Datasheet, PDF (308/930 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperHTM RISC engine Family/SH7144 Series

11. Multi-Function Timer Pulse Unit (MTU)
TCNT value
H'0180
H'0160
Counter cleared by TIOCB
input (falling edge)
H'0010
H'0005
H'0000
TIOCA
TGRA
H'0005
H'0160
Time
H'0010
TIOCB
TGRB
H'0180
Figure 11.10 Example of Input Capture Operation
11.4.2 Synchronous Operation
In synchronous operation, the values in a number of TCNT counters can be rewritten
simultaneously (synchronous presetting). Also, a number of TCNT counters can be cleared
simultaneously by making the appropriate setting in TCR (synchronous clearing).
Synchronous operation enables TGR to be incremented with respect to a single time base.
Channels 0 to 4 can all be designated for synchronous operation.
Rev.4.00 Mar. 27, 2008 Page 264 of 882
REJ09B0108-0400