SH7144_08 Datasheet, PDF (739/930 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperHTM RISC engine Family/SH7144 Series

22. User Debugging Interface (H-UDI)
22.2 Input/Output Pins
Table 22.1 shows the H-UDI pin configuration.
Table 22.1 H-UDI Pins
Pin Name
Test clock
Abbreviation I/O
TCK
Input
Test mode TMS
select
Test data TDI
input
Test data
output
TDO
Test reset TRST
Input
Input
Output
Input
Function
Test Clock Input
TCK supplies an independent clock to the H-UDI. As
the clock input to TCK is supplied directly to the H-UDI,
a clock waveform with a duty cycle close to 50%
should be input (see section 26, Electrical
Characteristics, for details).
Test Mode Select Input Signal
TMS is sampled at the rising edge of TCK. TMS
controls the internal state of the TAP controller.
Serial Data Input
TDI performs serial input of instructions and data to H-
UDI registers. TDI is sampled at the rising edge of
TCK.
Serial Data Output
TDO performs serial output of instructions and data
from H-UDI registers. Transfer is synchronized with
TCK. When no signal is being output, TDO goes to the
high-impedance state.
Test Reset Input Signal
TRST is used to initialize the H-UDI asynchronously.
Rev.4.00 Mar. 27, 2008 Page 695 of 882
REJ09B0108-0400