SH7144_08 Datasheet, PDF(41/930 Page) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperHTM RISC engine Family/SH7144 Series

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SH7144_08 Datasheet, PDF (41/930 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperHTM RISC engine Family/SH7144 Series

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Table 11.13

Table 11.14

Table 11.15

Table 11.16

Table 11.17

Table 11.18

Table 11.19

Table 11.20

Table 11.21

Table 11.22

Table 11.23

Table 11.24

Table 11.25

Table 11.26

Table 11.27

Table 11.28

Table 11.29

Table 11.30

Table 11.31

Table 11.32

Table 11.33

Table 11.34

Table 11.35

Table 11.36

Table 11.37

Table 11.38

Table 11.39

Table 11.40

Table 11.41

Table 11.42

Table 11.43

Table 11.44

Table 11.45

TIOR_2 (Channel 2) .............................................................................................231

TIORH_3 (Channel 3) ..........................................................................................232

TIORL_3 (Channel 3)...........................................................................................233

TIORH_4 (Channel 4) ..........................................................................................234

TIORL_4 (Channel 4)...........................................................................................235

TIORH_0 (Channel 0) ..........................................................................................236

TIORL_0 (Channel 0)...........................................................................................237

TIOR_1 (Channel 1) .............................................................................................238

TIOR_2 (Channel 2) .............................................................................................239

TIORH_3 (Channel 3) ..........................................................................................240

TIORL_3 (Channel 3)...........................................................................................241

TIORH_4 (Channel 4) ..........................................................................................242

TIORL_4 (Channel 4)...........................................................................................243

Output Level Select Function ...............................................................................253

Output Level Select Function ...............................................................................254

Output level Select Function.................................................................................256

Register Combinations in Buffer Operation .........................................................266

Cascaded Combinations........................................................................................269

PWM Output Registers and Output Pins ..............................................................272

Phase Counting Mode Clock Input Pins ...............................................................276

Up/Down-Count Conditions in Phase Counting Mode 1......................................277

Up/Down-Count Conditions in Phase Counting Mode 2......................................278

Up/Down-Count Conditions in Phase Counting Mode 3......................................279

Up/Down-Count Conditions in Phase Counting Mode 4......................................280

Output Pins for Reset-Synchronized PWM Mode ................................................282

Register Settings for Reset-Synchronized PWM Mode ........................................282

Output Pins for Complementary PWM Mode.......................................................285

Register Settings for Complementary PWM Mode ..............................................286

Registers and Counters Requiring Initialization ...................................................293

MTU Interrupts .....................................................................................................311

Mode Transition Combinations ............................................................................337

Pin Configuration..................................................................................................370

Pin Combinations..................................................................................................370

Section 12 Watchdog Timer (WDT)

Table 12.1 Pin Configuration..................................................................................................380

Table 12.2 WDT Interrupt Source (in Interval Timer Mode) .................................................388

Section 13 Serial Communication Interface (SCI)

Table 13.1 Pin Configuration..................................................................................................395

Table 13.2 Relationships between N Setting in BRR and Effective Bit Rate B0 ....................416

Rev.4.00 Mar. 27, 2008, Page xli of xliv

REJ09B0108-0400

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