SH7144_08 Datasheet, PDF (597/930 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperHTM RISC engine Family/SH7144 Series

15. A/D Converter
15.5 Interrupt Sources and DTC, DMAC Transfer Requests
The A/D converter generates an A/D conversion end interrupt (ADI) upon the completion of A/D
conversion. ADI interrupt requests are enabled when the ADIE bit is set to 1 while the ADF bit in
ADCSR is set to 1 after A/D conversion is completed. The data transfer controller (DTC) or the
direct memory access controller (DMAC) can be activated by an ADI interrupt. Having the
converted data read by the DTC or the DMAC in response to an ADI interrupt enables continuous
conversion to be achieved without imposing a load on software.
When the DTC or the DMAC is activated by an ADI interrupt, the ADF bit in ADCSR is
automatically cleared when data is transferred by the DTC or the DMAC.
Table 15.5 A/D Converter Interrupt Sources
Name Interrupt Source
Interrupt Source Flag DTC Activation DMAC Activation
ADI0 A/D0 conversion completed ADF in ADCSR_0
Possible
Impossible
ADI1 A/D1 conversion completed ADF in ADCSR_1
Possible
Possible
Rev.4.00 Mar. 27, 2008 Page 553 of 882
REJ09B0108-0400