SH7144_08 Datasheet, PDF (420/930 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperHTM RISC engine Family/SH7144 Series

11. Multi-Function Timer Pulse Unit (MTU)
8/16/128 clock
cycles
Pφ
Sampling
clock
POE input
PE9/
TIOC3B
High-impedance
state*
When low level is
Flag set
sampled at all points ¹
2
3
16 _{(POE received)}
When high level is
sampled at least once
1
2
13 Flag not set
Note: * Other large-current pins (PE11/TIOC3D, PE12/TIOC4A, PE13/TIOC4B/MRES, PE14/TIOC4C,
PE15/TIOC4D/IRQOUT) also go to the high-impedance state at the same timing.
Figure 11.115 Low-Level Detection Operation
Output-Level Compare Operation:
Figure 11.116 shows an example of the output-level compare operation for the combination of
PE9/TIOC3B and PE11/TIOC3D. The operation is the same for the other pin combinations.
Pφ
PE9/
TIOC3B
PE11/
TIOC3D
Low level overlapping detected
High impedance state
Figure 11.116 Output-Level Detection Operation
Rev.4.00 Mar. 27, 2008 Page 376 of 882
REJ09B0108-0400