SH7144_08 Datasheet, PDF (578/930 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperHTM RISC engine Family/SH7144 Series

14. I²C Bus Interface (IIC) Option
No
IRIC=1?
Yes
Clear IRIC in ICCR
[1] Wait for completion of one-byte transfer.
Set the start
condition?
No
Other processing
Yes
Read the SCL pin
No
SCL=Low?
Yes
Write 1 to BBSY and
0 to SCP of ICSR
[2] Decide whether or not SCL is low.
[3] Execuse the instruction that sets the start
condition for re-transmission.
No
IRIC = 1?
Yes
Write the data for
transmission to ICDR
SCL
[4] Confirm the start condition generation
[5] Set the data for transmission (slave address+R/W)
Note: Program so that steps 3 to 5 above are
executed continuously.
Start condition (re-transmission)
SDA
ACK
bit7
IRIC
[5] Write to ICDR (transfer data)
[1] Tasting of IRIC
[4] Testing of IRIC
[3] Start condition instruction
issuance (re-transmission)
[2] Testing of SCL=Low
Figure 14.30 Flowchart and Timing of the Execution of the Instruction that Sets the Start
Condition for Re-Transmission
Rev.4.00 Mar. 27, 2008 Page 534 of 882
REJ09B0108-0400