SH7144_08 Datasheet, PDF (297/930 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperHTM RISC engine Family/SH7144 Series

11. Multi-Function Timer Pulse Unit (MTU)
11.3.11 Timer Output Control Register (TOCR)
TOCR is an 8-bit readable/writable register that enables/disables PWM synchronized toggle
output in complementary PWM mode/reset synchronized PWM mode, and controls output level
inversion of PWM output.
Bit Bit Name Initial value R/W
7—
0
R
6 PSYE
0
R/W
5 to 2 —
All 0
R
1 OLSN
0
R/W
0 OLSP
0
R/W
Description
Reserved
This bit is always read as 0. The write value should
always be 0.
PWM Synchronous Output Enable
This bit selects the enable/disable of toggle output
synchronized with the PWM period.
0: Toggle output is disabled
1: Toggle output is enabled
Reserved
These bits are always read as 0. The write value
should always be 0.
Output Level Select N
This bit selects the reverse phase output level in
reset-synchronized PWM mode/complementary
PWM mode. See table 11.26
Output Level Select P
This bit selects the positive phase output level in
reset-synchronized PWM mode/complementary
PWM mode. See table 11.27
Table 11.26 Output Level Select Function
Bit 1
Function
Compare Match Output
OLSN Initial Output Active Level _{Up Count}
Down Count
0
High level
Low level
High level
Low level
1
Low level
High level
Low level
High level
Note: The reverse phase waveform initial output value changes to active level after elapse of the
dead time after count start.
Rev.4.00 Mar. 27, 2008 Page 253 of 882
REJ09B0108-0400