SH7144_08 Datasheet, PDF (67/930 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperHTM RISC engine Family/SH7144 Series

2. CPU
Table 2.5 Immediate Data Accessing
Classification CPU of This LSI
Example of Conventional CPU
8-bit immediate MOV
#H'12,R0
MOV.B #H'12,R0
16-bit immediate MOV.W
@(disp,PC),R0
MOV.W #H'1234,R0
.................
.DATA.W H'1234
32-bit immediate MOV.L
@(disp,PC),R0
MOV.L #H'12345678,R0
.................
.DATA.L H'12345678
Note: @(disp, PC) accesses the immediate data.
Absolute Address: When data is accessed by absolute address, the value in the absolute address is
placed in the memory table in advance. That value is transferred to the register by loading the
immediate data during the execution of the instruction, and the data is accessed in the indirect
register addressing mode.
Table 2.6 Absolute Address Accessing
Classification
CPU of This LSI
Example of Conventional CPU
Absolute address MOV.L
@(disp,PC),R1
MOV.B @H'12345678,R0
MOV.B
@R1,R0
..................
.DATA.L H'12345678
Note: @(disp,PC) accesses the immediate data.
16-Bit/32-Bit Displacement: When data is accessed by 16-bit or 32-bit displacement, the
displacement value is placed in the memory table in advance. That value is transferred to the
register by loading the immediate data during the execution of the instruction, and the data is
accessed in the indirect indexed register addressing mode.
Rev.4.00 Mar. 27, 2008 Page 23 of 882
REJ09B0108-0400