SH7144_08 Datasheet, PDF (186/930 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperHTM RISC engine Family/SH7144 Series

9. Bus State Controller (BSC)
Table 9.2 Address Map
• On-chip ROM enabled mode
Address
Space
Memory
Size
H'00000000 to H'0003FFFF On-chip ROM
On-chip ROM
256 kbytes
H'00040000 to H'001FFFFF Reserved
Reserved
H'00200000 to H'003FFFFF CS0 space
External space
2 Mbytes
H'00400000 to H'007FFFFF CS1 space
External space
4 Mbytes
H'00800000 to H'00BFFFFF CS2 space
External space
4 Mbytes
H'00C00000 to H'00FFFFFF CS3 space
External space
4 Mbytes
H'01000000 to H'011FFFFF
H'01200000 to H'013FFFFF
H'01400000 to H'017FFFFF
H'01800000 to H'01BFFFFF
H'01C00000 to H'01FFFFFF
Reserved
CS4 space*³
CS5 space*³
CS6 space*³
CS7 space*³
Reserved
External space
External space
External space
External space
2 Mbytes
4 Mbytes
4 Mbytes
4 Mbytes
H'02000000 to H'FFFF7FFF Reserved
Reserved
H'FFFF8000 to H'FFFFBFFF On-chip peripheral On-chip peripheral 16 kbytes
module
module
H'FFFFC000 to H'FFFFDFFF Reserved
Reserved
H'FFFFE000 to H'FFFFFFFF On-chip RAM
On-chip RAM
8 kbytes
Bus Width
32 bits
8/16/32 bits*¹
8/16/32 bits*¹
8/16/32 bits*¹
8/16/32 bits*¹
8/16/32 bits*¹
8/16/32 bits*¹
8/16/32 bits*¹
8/16/32 bits*¹
8/16 bits
32 bits
Rev.4.00 Mar. 27, 2008 Page 142 of 882
REJ09B0108-0400