SH7144_08 Datasheet, PDF (529/930 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperHTM RISC engine Family/SH7144 Series

14. I²C Bus Interface (IIC) Option
[Legend]
0:
0-state retained
1:
1-state retained
⎯: Previous state retained
0:
Cleared to 0
1:
Set to 1
Notes: 1. Set to 1 when 1 is received as a R/ W bit following an address.
2. Set to 1 when the AASX bit is set to 1.
3. STOP is 0 when ESTP = 1, or ESTP is 0 when STOP = 1.
Rev.4.00 Mar. 27, 2008 Page 485 of 882
REJ09B0108-0400