SH7144_08 Datasheet, PDF (906/930 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperHTM RISC engine Family/SH7144 Series

D. I/O Port Block Diagrams
RES
R
Q PE4DR D
C
PEDRL.WR
AUDATA2 (AUD)
TIOC1A (MTU)
PEDRL.RD
TIOC1A (MTU)
RXD3 (SCI)
AUDATA2 (AUD)
PFC
Q PE4MD0
Q PE4MD1
AUDSYNC
AUD reset
AUDMD
Q PE4IOR
Software standby
AUD module standby
SBYCR
Q Hi-Z
RES: Reset signal
PEDRL.RD: Port E data register L read signal
PEDRL.WR: Port E data register L write signal
Figure D.50 PE4/TIOC1A/RXD3/AUDATA2
Pins
PE4/TIOC1A/
RXD3/
AUDATA2
Symbol in Figure D.50
Available Products
SH7144
SH7145
Masked ROM
Masked ROM
version/
version/
F-ZTAT ROM less
F-ZTAT ROM less
PE4 TIOC1A RXD3 AUDATA2 version _version
version version
PE4 TIOC1A RXD3 AUDATA2 ⎯
⎯
(MTU) (SCI) (AUD)
√
⎯
Rev.4.00 Mar. 27, 2008 Page 862 of 882
REJ09B0108-0400