SH7144_08 Datasheet, PDF (679/930 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperHTM RISC engine Family/SH7144 Series

18. I/O Ports
Port A in the SH7145 is an input/output port with the 24 pins shown in figure 18.2
Port A
PA23 (I/O) / WRHH (output)
PA22 (I/O) / WRHL (output)
PA21 (I/O) /CS5 (output)*²
PA20 (I/O) /CS4 (output)*²
PA19 (I/O) / BACK (output) / DRAK1 (output)
PA18 (I/O) / BREQ (input) / DRAK0 (output)
PA17 (I/O) / WAIT (input)
PA16 (I/O) / AUDSYNC (I/O)^*1
PA15 (I/O) / CK (output)
PA14 (I/O) / RD (output)
PA13 (I/O) / WRH (output)
PA12 (I/O) / WRL (output)
PA11 (I/O) / CS1 (output)
PA10 (I/O) / CS0 (output)
PA9 (I/O) / TCLKD (input) / IRQ3 (input)
PA8 (I/O) / TCLKC (input) / IRQ2 (input)
PA7 (I/O) / TCLKB (input) / CS3 (output)
PA6 (I/O) / TCLKA (input) / CS2 (output)
PA5 (I/O) / SCK1 (I/O) / DREQ1 (input) / IRQ1 (input)
PA4 (I/O) / TXD1 (output)
PA3 (I/O) / RXD1 (input)
PA2 (I/O) / SCK0 (I/O) / DREQ0 (input) / IRQ0 (input)
PA1 (I/O) / TXD0 (output)
PA0 (I/O) / RXD0 (input)
Notes: 1. Only for the F-ZTAT version (no corresponding function in the masked ROM version and ROM less version).
2. Only for the Masked ROM version and ROM less version (no corresponding function in the F-ZTAT version
and emulator).
Figure 18.2 Port A (SH7145)
Rev.4.00 Mar. 27, 2008 Page 635 of 882
REJ09B0108-0400