SH7144_08 Datasheet, PDF (57/930 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperHTM RISC engine Family/SH7144 Series

1. Overview
Type
Symbol I/O
Name
Function
User
debugging
interface
(H-UDI)
(flash version
only)
TCK
TMS
TDI
TDO
Input
Input
Input
Output
Test clock
Test mode
select
Test data
input
Test data
output
Test clock input pin.
Test mode select signal input pin.
Instruction/data serial input pin.
Instruction/data serial output pin.
TRST
Input Test reset
Initialization signal input pin.
Advanced AUDATA3 to Input/
user debugger AUDATA0 Output
(AUD)
(flash version
only)
AUDRST Input
AUD data
AUD reset
Branch trace mode: Branch destination
address output pins.
RAM monitor mode: Monitor address
input/data input/output pins.
Reset signal input pin.
AUDMD Input AUD mode Mode select signal input pin.
Branch trace mode: Low
RAM monitor mode: High
AUDCK
Input/ AUD clock
Output
Branch trace mode: Synchronous clock
output pin.
AUDSYNC Input/
Output
AUD
synchroniza-
tion signal
RAM monitor mode: Synchronous clock
input pin.
Branch trace mode: Data start position
identification signal output pin.
RAM monitor mode: Data start position
identification signal input pin.
E10 interface ASEBRKAK Output
(flash version
only)
Break mode
acknowledge
Shows that E10A has entered to the break
mode. Refer to “SH7144F E10A Emulator
User’s Manual” for the detail of the
connection to E10A.
DBGMD
Input
Debug mode
Enables the functions of E10A emulator.
Input low to the pin in normal operation
(other than the debug mode). In debug
mode, input high to the pin on the user
board. Refer to “SH7144F E10A Emulator
User’s Manual” for the detail of the
connection to E10A.
[Caution]
Do not pull-down the WDTOVF pin. If this pin needs to be pulled-down, however, the
resistor value must be 1 MΩ or higher.
Rev.4.00 Mar. 27, 2008 Page 13 of 882
REJ09B0108-0400