SH7144_08 Datasheet, PDF (342/930 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperHTM RISC engine Family/SH7144 Series

11. Multi-Function Timer Pulse Unit (MTU)
Timer output control register settings
OLSN bit: 0 (initial output: high; active level: low)
OLSP bit: 0 (initial output: high; active level: low)
TCNT_3, 4 value
TCNT_3
TCNT_4
Positive phase
output
Negative phase
output
TDDR
TGRA_4
Initial output
Active level
Time
Complementary
PWM mode
(TMDR setting)
TCNT_3, 4 count start
(TSTR setting)
Figure 11.39 Example of Initial Output in Complementary PWM Mode (2)
Rev.4.00 Mar. 27, 2008 Page 298 of 882
REJ09B0108-0400