SH7144_08 Datasheet, PDF (232/930 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperHTM RISC engine Family/SH7144 Series

10. Direct Memory Access Controller (DMAC)
Address Modes:
• Single Address Mode
In the single address mode, both the transfer source and destination are external; one is
accessed by a DACK signal while the other is accessed by an address. In this mode, the
DMAC performs the DMA transfer in 1 bus cycle by simultaneously outputting a transfer
request acknowledge DACK signal to one external device to access it while outputting an
address to the other end of the transfer. Figure 10.4 shows an example of a transfer between an
external memory and an external device with DACK in which the external device outputs data
to the data bus while that data is written in external memory in the same bus cycle.
External address bus
This LSI
DMAC
External data bus
External
memory
External device
with DACK
DACK
DREQ
: Data flow
Figure 10.4 Data Flow in Single Address Mode
Rev.4.00 Mar. 27, 2008 Page 188 of 882
REJ09B0108-0400