SH7144_08 Datasheet, PDF (144/930 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperHTM RISC engine Family/SH7144 Series

6. Interrupt Controller (INTC)
6.8.4
Handling Interrupt Request Signals as Source for CPU Interrupt but Not DMAC
and DTC Activating
1 Do not select DMAC activating sources or clear the DME bit to 0.
2. For DTC, clear the corresponding DTE bits to 0.
3. When interrupts occur, interrupt requests are sent to the CPU.
4. The CPU clears the interrupt source and performs the necessary processing in the interrupt
processing routine.
Rev.4.00 Mar. 27, 2008 Page 100 of 882
REJ09B0108-0400